Digital System Design With Fpga Using Verilog
Last updated 1/2023
Created by Maqsood Ali Mughal
MP4 | Video: h264, 1280x720 | Audio: AAC, 44.1 KHz, 2 Ch
Level: Beginner | Genre: eLearning | Language: English + subtitle | Duration: 19 Lectures ( 8h 32m ) | Size: 5.45 GB
with access to Project Files and Code
What you'll learn
✓ Learn Verilog from scratch on Vivado platform
✓ Design finite state machines (FSM) with real world application such as games
✓ Learn Verilog to establish an interface between Vivado and FPGA, and implement design onto FPGA
✓ Create testbench files, simulate and analyze logic circuit diagrams to verify the logic
Requirements
● No programming experience required. The course will start at a very basic level and slowly transitions to an intermiediate to advance level.
Description
Digital circuits are the foundation upon which the computers, cell phones, and calculators we use every day are built. This course explores these foundations using modern digital design techniques to design, implement and test digital circuits ranging in complexity from basic logic gates to state machines that perform useful functions like calculations, counting, timing, and a host of other applications. Students will learn modern design techniques using a hardware description language (HDL) such as Verilog to design, simulate and implement logic systems consisting of basic gates, adders, multiplexers, latches, and counters. The function and operation of programmable logic devices, such as field programmable gate arrays (FPGAs), will be described and discussed in terms of how an HDL logic design is mapped and implemented.
Learn about Verilog as a beginner. In this course, we will learn about the basics of Verilog and how we can use it in the Vivado environment to generate combinational and sequential designs. We'll design finite state machines with real-world applications such as vending machines, T20 Cricket Games, Counters, etc., and implement them onto an FPGA board. We'll learn about the basic understanding of generating slow clocks, shift registers, flip flops, and counters to design basic-intermediate-advance-level FPGA projects. In addition, we'll generate testbench files to validate the logic and analyze the functionality of the design. The course will cover an explanation of the code line by line that students can follow and replicate on their own board while they watch the video.
Access to project files, supporting material, and code is included in the course
Come and join the course and become an expert on Verilog and FPGAs.
Who this course is for
■ Digital Electronics Students
■ FPGA beginners
■ Verilog VHDL beginners
■ Electrical Engineering Students
■ FPGA Learners
■ FPGA Projects
Code:
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